| author | Urja (ARMLFS builder)
<urja+armlfs@urja.dev> 2025-02-10 10:15:09 UTC |
| committer | Urja (ARMLFS builder)
<urja+armlfs@urja.dev> 2025-02-10 10:15:09 UTC |
| parent | 5aaab434f1722250dc8a85bf7966a5b62a53a3c4 |
| .SRCINFO | +36 | -0 |
| PKGBUILD | +3 | -3 |
| armlfs.patch | +26 | -26 |
diff --git a/.SRCINFO b/.SRCINFO new file mode 100644 index 0000000..6d92efa --- /dev/null +++ b/.SRCINFO @@ -0,0 +1,36 @@ +pkgbase = linux-armlfs-lts61 + pkgver = 6.1.128 + pkgrel = 1 + url = http://www.kernel.org/ + arch = armv7h + license = GPL2 + makedepends = xmlto + makedepends = docbook-xsl + makedepends = kmod + makedepends = inetutils + makedepends = bc + makedepends = git + makedepends = dtc + makedepends = vboot-utils + makedepends = uboot-tools + options = !strip + source = https://www.kernel.org/pub/linux/kernel/v6.x/linux-6.1.tar.xz + source = https://www.kernel.org/pub/linux/kernel/v6.x/patch-6.1.128.xz + source = armlfs.patch + source = kernel.its + source = kernel.keyblock + source = kernel_data_key.vbprivk + source = 60-linux.hook + source = config + sha256sums = 2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb + sha256sums = 05b926583c0805a2064c995a1a186415d3b50462686bf00430e768e02e08bc4e + sha256sums = b1761ccf1a44f32961b5315be693148746ddc48d3caf31eb708d89624b03e4f8 + sha256sums = 307b66929260454f922bd3f2543e19f87667d2232fe368a4fece9ee86bc124fa + sha256sums = 4e708c9ec43ac4a5d718474c9431ba6b6da3e64a9dda6afd2853a9e9e3079ffb + sha256sums = bc9e707a86e55a93f423e7bcdae4a25fd470b868e53829b91bbe2ccfbc6da27b + sha256sums = ae2e95db94ef7176207c690224169594d49445e04249d2499e9d2fbc117a0b21 + sha256sums = 88e1964eaa0eb6f728f8c9f4d402762460c6e5ab3117017893deb181429f1322 + +pkgname = linux-armlfs-lts61 + +pkgname = linux-armlfs-lts61-chromebook diff --git a/PKGBUILD b/PKGBUILD index a2cdaaf..bf36854 100644 --- a/PKGBUILD +++ b/PKGBUILD @@ -14,7 +14,7 @@ pkgbase=linux-armlfs${_xname} _srcname=linux-6.1 _kernelname=${pkgbase#linux} _desc="Veyron Speedy" -pkgver=6.1.102 +pkgver=6.1.128 pkgrel=1 arch=('armv7h') url="http://www.kernel.org/" @@ -170,8 +170,8 @@ for _p in ${pkgname[@]}; do done sha256sums=('2ca1f17051a430f6fed1196e4952717507171acfd97d96577212502703b25deb' - '2761965eeeb54dce4ac118d74cee239ef5141efe369094d6e8e51891472f827d' - 'b1d3e59ed6df31ce26bc95723a3c4e1d534f0edca93b7c99b27def9f09c3a886' + '05b926583c0805a2064c995a1a186415d3b50462686bf00430e768e02e08bc4e' + 'b1761ccf1a44f32961b5315be693148746ddc48d3caf31eb708d89624b03e4f8' '307b66929260454f922bd3f2543e19f87667d2232fe368a4fece9ee86bc124fa' '4e708c9ec43ac4a5d718474c9431ba6b6da3e64a9dda6afd2853a9e9e3079ffb' 'bc9e707a86e55a93f423e7bcdae4a25fd470b868e53829b91bbe2ccfbc6da27b' diff --git a/armlfs.patch b/armlfs.patch index f8f0d5a..ed66834 100644 --- a/armlfs.patch +++ b/armlfs.patch @@ -1,4 +1,4 @@ -From c89e8429c24c3c4eefee6591fc2aaa29a4f24fc4 Mon Sep 17 00:00:00 2001 +From 0ac42c7d58c4e96836a0e87835a07f0f25c05cac Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Mon, 27 Aug 2018 10:30:55 +0000 Subject: [PATCH 01/15] drivers: clk-rk3288: support for dedicating NPLL to a @@ -166,7 +166,7 @@ index ee01739e4a7c..45079f1376e9 100644 2.44.0 -From 3a5d22da5e05215ed9be70baeb34f080b20283b4 Mon Sep 17 00:00:00 2001 +From 019105ced631e4d21855fbe55f1928e79a3d5fa0 Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Wed, 22 Aug 2018 18:36:40 +0000 Subject: [PATCH 02/15] drm: dw_hdmi-rockchip: better clock selection logic and @@ -199,7 +199,7 @@ Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com> 1 file changed, 174 insertions(+), 97 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c -index ae857bf8bd62..e20fb15fc8aa 100644 +index 566f2942f24a..8219b8d62e5d 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -80,8 +80,13 @@ struct rockchip_hdmi { @@ -545,7 +545,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup, .mode_set = dw_hdmi_rockchip_encoder_mode_set, .enable = dw_hdmi_rockchip_encoder_enable, -@@ -425,7 +505,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = { +@@ -427,7 +507,6 @@ static struct rockchip_hdmi_chip_data rk3228_chip_data = { }; static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = { @@ -553,7 +553,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, -@@ -442,7 +521,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = { +@@ -444,7 +523,6 @@ static struct rockchip_hdmi_chip_data rk3288_chip_data = { }; static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = { @@ -561,7 +561,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, -@@ -462,7 +540,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = { +@@ -464,7 +542,6 @@ static struct rockchip_hdmi_chip_data rk3328_chip_data = { }; static const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = { @@ -569,7 +569,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, -@@ -480,7 +557,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = { +@@ -482,7 +559,6 @@ static struct rockchip_hdmi_chip_data rk3399_chip_data = { }; static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = { @@ -577,7 +577,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, -@@ -493,7 +569,6 @@ static struct rockchip_hdmi_chip_data rk3568_chip_data = { +@@ -495,7 +571,6 @@ static struct rockchip_hdmi_chip_data rk3568_chip_data = { }; static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = { @@ -585,7 +585,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 .mpll_cfg = rockchip_mpll_cfg, .cur_ctr = rockchip_cur_ctr, .phy_config = rockchip_phy_config, -@@ -624,6 +699,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, +@@ -626,6 +701,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, return 0; err_bind: @@ -593,7 +593,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 drm_encoder_cleanup(encoder); clk_disable_unprepare(hdmi->ref_clk); err_clk: -@@ -639,6 +715,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master, +@@ -641,6 +717,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master, { struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); @@ -605,7 +605,7 @@ index ae857bf8bd62..e20fb15fc8aa 100644 2.44.0 -From 216a4e0bbf4d277438afeeedbf8df26590865134 Mon Sep 17 00:00:00 2001 +From e39a3504fa87f570e5a9c5f16b04216c201de2ab Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Mon, 27 Aug 2018 19:00:50 +0000 Subject: [PATCH 03/15] dts: rk3288: support for dedicating npll to a vop @@ -644,7 +644,7 @@ index 511ca864c1b2..0a18ba9c3941 100644 2.44.0 -From d997113728dba1e1dcb4d4de10b4c60f6863ef6f Mon Sep 17 00:00:00 2001 +From 059bbc529c6d268f93ac73a5210124679ab8e9bf Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Mon, 27 Aug 2018 19:03:49 +0000 Subject: [PATCH 04/15] dts: rk3288-veyron-chromebook: dedicate npll to @@ -737,7 +737,7 @@ index 700bb548d6b2..15086bd40a45 100644 2.44.0 -From d075ccb8b05aefae50e5101df7d45a75cc52fda9 Mon Sep 17 00:00:00 2001 +From 25d9de79d3e291f69a0cb8d472811471ffaf70c6 Mon Sep 17 00:00:00 2001 From: SolidHal <hal@halemmerich.com> Date: Sun, 21 Oct 2018 16:40:15 -0500 Subject: [PATCH 05/15] Added a second reset when having an issue reading the @@ -790,7 +790,7 @@ index 657772546b6b..ab3e5dee00a4 100644 2.44.0 -From 867e8b54709cfd0b3bb2354597f9db5e8c3d1aaf Mon Sep 17 00:00:00 2001 +From 5162ba0ee9b47e5f9beadb4432aff4c2c8f5fde7 Mon Sep 17 00:00:00 2001 From: "Miouyouyou (Myy)" <myy@miouyouyou.fr> Date: Tue, 9 Oct 2018 22:01:07 +0200 Subject: [PATCH 06/15] block: partitions: efi: Ignore bizarre Chromebook GPT @@ -943,7 +943,7 @@ index 84b9f36b9e47..09726227e891 100644 2.44.0 -From 97bcfb7ea78d2c0043b1c8c32860b8601ad4fd77 Mon Sep 17 00:00:00 2001 +From 1fa6a391838a080bfa27e4b85e874ca8856f903d Mon Sep 17 00:00:00 2001 From: "Miouyouyou (Myy)" <myy@miouyouyou.fr> Date: Tue, 30 Oct 2018 22:44:54 +0100 Subject: [PATCH 07/15] mmc: Added a flag to disable cache flush during reset @@ -1031,7 +1031,7 @@ index 8f918f9a1228..e8dd4fee4316 100644 2.44.0 -From af2fc9eba49416fe6ca144eb7a1fc4d4aab583f0 Mon Sep 17 00:00:00 2001 +From f57f75cf3dc5b663822a6e67156a0876e63eda67 Mon Sep 17 00:00:00 2001 From: "Miouyouyou (Myy)" <myy@miouyouyou.fr> Date: Thu, 1 Nov 2018 21:31:26 +0100 Subject: [PATCH 08/15] arm: dts: veyron: Added a flag to disable cache flush @@ -1064,7 +1064,7 @@ index e406c8c7c7e5..bb0165848545 100644 2.44.0 -From fa7843c4d26b81c41cc67892c55e36f589c0be4d Mon Sep 17 00:00:00 2001 +From 4b06ebe65804d4eb5825bad50f9b45c1a231f8e7 Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Mon, 18 Mar 2019 22:40:52 +0000 Subject: [PATCH 09/15] dwc2 veyron otg mode hack @@ -1185,10 +1185,10 @@ index 1d72ece9cfe4..3e0a09c14c97 100644 /* Create one file for each out endpoint */ for (epidx = 0; epidx < hsotg->num_of_eps; epidx++) { diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c -index 2e4c6884f36a..1c6dec03bfd9 100644 +index 9de5a1be4a0a..69c16a216773 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c -@@ -499,6 +499,8 @@ static int dwc2_driver_probe(struct platform_device *dev) +@@ -501,6 +501,8 @@ static int dwc2_driver_probe(struct platform_device *dev) * other time after this. */ dwc2_force_dr_mode(hsotg); @@ -1201,7 +1201,7 @@ index 2e4c6884f36a..1c6dec03bfd9 100644 2.44.0 -From c275b68360ee52e990ad1441b384637ed52f04c7 Mon Sep 17 00:00:00 2001 +From 9827ad8a68ef96d7f8d7fa55bf09d8c7892e8502 Mon Sep 17 00:00:00 2001 From: Hal Emmerich <hal@halemmerich.com> Date: Wed, 21 Aug 2019 16:52:41 -0500 Subject: [PATCH 10/15] Fix ath9k dwc2 init frame overruns @@ -1244,7 +1244,7 @@ index 0a1145592fc7..a39c646485cc 100644 2.44.0 -From 26f2793b49007d683ab76491c28393e86f29a773 Mon Sep 17 00:00:00 2001 +From f559cba5b5fa5a7113e1b9f7920a5c597fe0b9bd Mon Sep 17 00:00:00 2001 From: barzur <boris@konbu.org> Date: Fri, 12 Jul 2019 11:33:32 +0900 Subject: [PATCH 11/15] usb/dwc2/hcd: channel halt may not be an error @@ -1284,7 +1284,7 @@ meantime I'm including it here. 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c -index dd5b1c5691e1..e3c21829d4b3 100644 +index c1de38de2806..79ad20b3f863 100644 --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c @@ -2457,7 +2457,8 @@ static void dwc2_free_dma_aligned_buffer(struct urb *urb) @@ -1315,7 +1315,7 @@ index 9e85cbb0c4f1..a75ded5d8536 100644 2.44.0 -From c90e72699ec31dae3c8b86d7a3dd47dca544d058 Mon Sep 17 00:00:00 2001 +From dd95f25c329b07c0e4525f89e757a95b12d8c83e Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Tue, 8 Oct 2019 11:03:37 +0000 Subject: [PATCH 12/15] drm/panel: edp: Extend Innolux N116BGE mode info for @@ -1362,7 +1362,7 @@ index 2c14779a39e8..162d5e76a40c 100644 2.44.0 -From 9e4618b6782bb359147f099874a87311d2d990c7 Mon Sep 17 00:00:00 2001 +From ae2da15d99d5eb2809dab3ea912625f4805f68ef Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Tue, 8 Oct 2019 11:12:33 +0000 Subject: [PATCH 13/15] ARM: dts: rockchip: Adjust rk3288-veyron n116bge mode @@ -1401,7 +1401,7 @@ index 32c0f10765dd..ea20818202fc 100644 2.44.0 -From 36a869c3475b92dfd6732ae5b563c085eceae43b Mon Sep 17 00:00:00 2001 +From 060d13d1b09d1d628fb40c48642da08e83ddd382 Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Tue, 28 Sep 2021 20:23:13 +0300 Subject: [PATCH 14/15] Revert "clk: divider: Implement and wire up @@ -1467,7 +1467,7 @@ index a2c2b5203b0a..9a63a0447d6f 100644 2.44.0 -From 80791dbb9450994048eb2ef0edf0971bce1b5a59 Mon Sep 17 00:00:00 2001 +From 90016919a5c77ff5ecc5ed2a5174a78bd9e8e7f1 Mon Sep 17 00:00:00 2001 From: Urja Rannikko <urjaman@gmail.com> Date: Mon, 25 Dec 2023 18:06:10 +0200 Subject: [PATCH 15/15] dts: veyron: bluetooth: disable dma on uart0