author | Felix Yan
<felixonmars@archlinux.org> 2021-12-07 13:13:58 UTC |
committer | Felix Yan
<felixonmars@archlinux.org> 2021-12-07 13:13:58 UTC |
parent | ffa8d06e60c3e65a5082ad4c00e25636653b46ed |
PKGBUILD | +3 | -3 |
diff --git a/PKGBUILD b/PKGBUILD index 42da8fc..8566faf 100644 --- a/PKGBUILD +++ b/PKGBUILD @@ -3,8 +3,8 @@ # Contributor: killruana <killruana@gmail.com> pkgname=yosys -pkgver=0.11 -pkgrel=2 +pkgver=0.12 +pkgrel=1 pkgdesc='A framework for RTL synthesis' arch=('x86_64') url='http://www.clifford.at/yosys/' @@ -15,7 +15,7 @@ checkdepends=('iverilog') optdepends=('graphviz: Schematics display support' 'xdot: Display netlists') source=("https://github.com/cliffordwolf/yosys/archive/$pkgname-$pkgver.tar.gz") -sha512sums=('19f6995e9a0b557de8a862a1b98aa10bc8e9a6b1b493f4c82927cf2a2b55684b3ed7aa35a86db506d18c11669b1303187fe7315eeee9222c6aa1bc6fffb26f45') +sha512sums=('df91ea75ae08c7c7e134cfa6284c4e9349e6f85f2df32e4710a571176d5e1a334a6e1e77d52bf573686d33b405559e40af1a8d42cbd4e1f95f0e3b4e212e0b06') _make() { make \